A patterning-based strain engineering for sub-22 nm node FinFETs
M. J. Suess, A. D. Barros, R. A. Minamisawa, R. Geiger, R. Spolenak, H. Sigg, M. Schmidt
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Agradecimentos: This work was supported by the Swiss National Science Foundation under Project 10 130181
e propose a strain engineering approach that is based on the patterning and under etching of fins using strained Si grown on SiGe strain relaxed buffers. The method enhances the strain of the patterned Fins up to similar to 2.9 GPa without the need of epitaxial source and drain stressors. We report...
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e propose a strain engineering approach that is based on the patterning and under etching of fins using strained Si grown on SiGe strain relaxed buffers. The method enhances the strain of the patterned Fins up to similar to 2.9 GPa without the need of epitaxial source and drain stressors. We report a systematic simulation study on the scaling of this method for the present and future technology nodes down to 7 nm. Finally, we estimate that the technique deliveries an electron mobility enhancement up to 87% for FinFETs, independent of the technology node
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DOI: https://doi.org/10.1109/LED.2014.2300865
Texto completo: https://ieeexplore.ieee.org/document/6730925
A patterning-based strain engineering for sub-22 nm node FinFETs
M. J. Suess, A. D. Barros, R. A. Minamisawa, R. Geiger, R. Spolenak, H. Sigg, M. Schmidt
A patterning-based strain engineering for sub-22 nm node FinFETs
M. J. Suess, A. D. Barros, R. A. Minamisawa, R. Geiger, R. Spolenak, H. Sigg, M. Schmidt
Fontes
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IEEE Electron Device Letters Vol. 35, no. 3 (Mar., 2014), p. 300-302 |