Please use this identifier to cite or link to this item:
|Type:||Artigo de evento|
|Title:||100gbit/s Fec For Otn Protocol: Design Architecture And Implementation Results|
De Oliveira J.C.
|Abstract:||Error correcting codes are widely used in telecommunication systems in order to increase the robustness of the system. With the exponential growth of the data communication world, the architecture of such systems have had to adapt to allow for improved channel capacity and reduced transmission costs. The architecture and hardware implementation challenges of the Reed Solomon RS(255, 239) for OTN networks in 100Gbit/s is presented.|
|Editor:||Institute of Electrical and Electronics Engineers Inc.|
|Appears in Collections:||Unicamp - Artigos e Outros Documentos|
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.