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|Type:||Artigo de periódico|
|Title:||Fabrication of p-type silicon nanowires for 3D FETs using focused ion beam|
|Author:||dos Santos, MVP|
|Abstract:||A Ga+ focused ion beam (GaFIB) from a FIB/scanning electron microscopy (SEM) dual beam system was used for Si milling and p-type local doping of p+-type silicon nanowires (p+-SiNWs). The resulting p+-SiNWs were then used to create pMOS junctionless nanowire transistor (INT) prototypes for silicon-on-insulator wafer substrates. The electron beam from the FIB/SEM dual beam system was used to deposit SiO2 gate dielectric and Pt source/drain electrodes for JNT transistors. Width, length, and height dimensions of p+-SiNWs were approximately 35 nm, 6 mu m, and 15 nm, respectively, and the JNT gate length was 1 mu m. Finally, photolithography, Al sputtering deposition, and lift-off processing were conducted to define the Al gate electrode and contacts on Pt source/drain electrodes. Energy dispersive x-ray spectroscopy measurements were taken to confirm the surface composition of p+-SiNWs and Ga doping. Drain-source current (I-DS) versus drain-source voltage (V-DS) measurements of JNT transistors indicated that the device is working like a JNT device (gated resistor). The authors noted high resistance on Al/Pt source and drain electrodes, which leads to distortions on Ins versus V-DS curves as non-ohmic electrical contact for low V-DS signal. However, these distortions can be reduced with a longer contact sintering process or by increased p+-SiNW doping. Our conclusions indicate that utilizing a GaFIB/SEM dual beam system for Si milling, Ga doping, and SiO2 and Pt depositions can be a favorable alternative for fabricating junctionless devices based on p+-SiNWs. (C) 2013 American Vacuum Society.|
|Editor:||A V S Amer Inst Physics|
|Appears in Collections:||Unicamp - Artigos e Outros Documentos|
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