Please use this identifier to cite or link to this item:
Type: Artigo de evento
Title: Multi-dimensional Evaluation Of Haswell's Transactional Memory Performance
Author: Pereira M.M.
Gaudet M.
Amaral J.N.
Araujo G.
Abstract: This paper presents an extensive performance study of the implementation of Hardware Transactional Memory (HTM) in the Haswell generation of Intel x86 core processors. This study evaluates the strengths and weaknesses of this new architecture exploring several dimensions in the space of Transactional Memory (TM) application characteristics using the Eigenbench [1] and the CLOMP-TM [2] benchmarks. This detailed performance study provides insights on the constraints imposed by the Intel's Transaction Synchronization Extension (Intel's TSX) and introduces a simple, but efficient policy for guaranteeing forward progress on top of the besteffort Intel's HTM and also was critical to achieving performance. The evaluation also shows that there are a number of potential improvements for designers of TM applications and software systems that use Intel's TM and provides recommendations to extract maximum benefit from the current TM support available in Haswell.
Editor: IEEE Computer Society
Citation: Proceedings - Symposium On Computer Architecture And High Performance Computing. Ieee Computer Society, v. , n. , p. 144 - 151, 2014.
Rights: fechado
Identifier DOI: 10.1109/SBAC-PAD.2014.33
Date Issue: 2014
Appears in Collections:Unicamp - Artigos e Outros Documentos

Files in This Item:
File Description SizeFormat 
2-s2.0-84919461959.pdf315.75 kBAdobe PDFView/Open

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.